The original Tierran virtual computer was designed by the author in the fall of 1989. In the summer of 1992, a series of meetings was held at the Santa Fe Institute to attempt to improve on the original design. Present at these meetings were: Steen Rassmussen (Santa Fe Institute), Walter Tackett (Hughes Aircraft), Chris Stephenson (IBM), Kurt Thearling (Thinking Machines), Dan Pirone (Santa Fe Institute), and the author. The discussions did not lead to a consensus as to how to improve on the original design, but rather, to three suggestions: instruction set 2 proposed by Kurt Thearling, instruction set 3 proposed by the author, and instruction set 4 proposed by Walter Tackett. In August 1992, the author implemented all three new instruction sets, and integrated them into the Tierra program. These four instruction sets are summarized in Appendix B.
The three new instruction sets are quite similar, differing primarily in the details of how information is moved between the registers of the CPU. Therefore, the differences between the first instruction set and the others will be described first. The new instruction sets include a number of features missing from the first: 1) Instructions for moving information between the CPU registers and the RAM memory ( movdi, movid). 2) Instructions providing input/output facilities ( put, get). 3) Facilitation of the full range of possible inter-register moves (this is where the three new instruction sets differ the most). 4) A conditional to test if the flag is set ( iffl). 5) The memory allocation instruction ( mal) has the option of specifying where the allocated memory will be located, or it may use other new options (i.e., better fit). 6) Facilities to support multi-cellularity. These include mechanisms of inter-cellular communication ( put, get) and innovations in the divide instruction that can provide a mechanism for gene regulation: the ability to determine where the instruction pointer starts executing in the daughter cell, and the ability to transfer the contents of the CPU registers from mother to daughter.
The original instruction set contained two inter-register moves: movcd (CX to DX) and movab (AX to BX). This is clearly incomplete, as there are many other register pairs between which moves are not allowed. However, the full set of four pushes and four pops makes it possible to move data in any direction between any pair of registers by combining the appropriate push-pop pair. Therefore, in designing the fourth instruction set, Walter Tackett chose to use the eight push-pop instructions to handle the inter-register moves, and the push-pop pairs are the only mechanism for inter-register moves in that instruction set.
In the third instruction set, inter-register moves are effected through the mechanisms used in the ``reverse Polish notation'' (RPN) as is found in the Hewlett-Packard calculators. This uses the rollu, rolld, enter, and exch instructions.
In the second instruction set, inter-register moves may be accomplished by a push-pop pair, or by the movdd (R0 = R1) instruction. However, this instruction set uses a level of indirection to refer to the registers. There are four ``shadow'' registers, each of which refers to one of the real registers. The contents of the shadow registers are determined by executing the four register instructions: AX, BX, CX, and DX. So, for example, if shadow register R0 contains the value CX, and shadow register R1 contains the value AX (which is arranged by executing the AX instruction followed by the CX instruction), then executing the movdd instruction, will move the value in AX to the CX register. All other instructions in set two also reference the actual registers through the shadow registers, and so may operate on any of the registers.
In addition to these fairly large differences in organization, each of the instructions that are common to the three new sets (e.g.: inc, dec, add, sub, zero, mal, pop, put, etc.) may differ between sets in which registers they reference. For example, in set two inc operates on R0, in set three on AX, and in set four on CX. There are also some small differences in the set of calculation instructions included. These are due to differences in the number of instructions consumed in implementing the inter-register moves. There were different numbers of opcodes ``left over'', and these were filled with calculations. Set four has seven calculations, set two has eight calculations, and set three has nine calculations.
The original 80 byte program was slightly modified so that it could be implemented in a consistent manner across the four instruction sets. The four new seed organisms were then tested in a series of eight runs in each of the four worlds (only four runs in the original world, because comparable data from this instruction set have already been published, ). The resulting twenty-eight runs form the basis of the comparisons of patterns of evolution across different worlds, and the analysis of the development of complex structures in one of those worlds (the fourth).